Sheet 4 of 5

About

Where I am, honestly
Graduated
2024 · B.Tech ECE
Professional
~1 year, power electronics
Satellite
2023 · student work

I graduated in 2024 and I have been designing power electronics professionally for about a year. That is the honest shape of it. The satellite at the top of the work page is from 2023, and it is student work — good student work, and it flew, but student work.

I keep it on the site because the distance between how I designed that board and how I would design it now is the most useful thing I can show you. On the CANSAT I routed power and signal on the same plane without thinking hard about return paths, sized the regulator by what was in the parts bin, and found out on the bench what I should have found out in simulation.

Today I start from the loss budget, specify the magnetics before the layout, and check the vendor's numbers against my own. The change did not come from reading about it. It came from a year of having to sign off boards that go into a product that has to pass CE.

I would rather you see that difference than a portfolio where everything looks equally finished.

Timeline

2020 to now

  1. 2020 – 2024

    B.Tech, Electronics and Communication Engineering

    AKGEC

  2. 2021 – 2024

    Electronics lead, AKGEC Robotics Club

  3. 2023

    CANSAT INDIA finalist

    Pico satellite, sole electronics engineer

  4. 2022, 2023

    ABU Asia-Pacific Robot Contest finalist, twice

  5. July 2024

    Patent filed

  6. 2024 – 2025

    Analogue layout programme

  7. July 2025 – now

    Hardware engineer, Gessler GmbH

    Mains switching supplies for emergency lighting

Capability matrix

Depth marker

owned contributed studied
Offline power conversion
CCM boost PFC, isolated GaN flyback, bus regulation, loop compensation CCM boost PFC, isolated GaN flyback, loop compensation
owned
Magnetics
Custom flyback transformer specification, verified independently in PI Expert Custom flyback transformer, verified in PI Expert
owned
Battery charging
Four-switch buck-boost, NiMH termination by −ΔV and temperature
owned
PCB layout, high speed
Six-layer impedance-controlled stackups, 90 Ω pairs, 50 Ω RF launches
contributed
Compliance and safety
IEC 60664 creepage and clearance, harmonic limits, hi-pot, CE documentation IEC 60664 creepage and clearance, hi-pot, CE documentation
contributed
Embedded bring-up
I²C control of flyback controllers, isolated power line communication
contributed
Analogue IC layout
A year of formal training; no taped-out silicon of my own
studied
Tools, education, recognition

Stated plainly

Tools

Altium Designer LTspice PI Expert Cadence Virtuoso Python Electronic load, thermal camera

Education

B.Tech, Electronics and Communication Engineering

AKGEC · 2020–2024

Patent

Filed July 2024

Recognition

CANSAT INDIA finalist, 2023

ABU Asia-Pacific Robot Contest finalist, 2022 and 2023

Work authorisation

Irish permit route
Critical Skills Employment Permit eligible
Occupation
Electronics Engineer · Critical Skills list
Labour Market Needs Test
Does not apply
Notice period
45 days · open to relocation